Personal tools
You are here: Home Workshops Summer 2009 Workshop on Libraries and Autotuning for Petascale Applications
Document Actions

Workshop on Libraries and Autotuning for Petascale Applications

by admin last modified 2009-10-15 11:10

August 10-12, 2009, Granlibakken Resort and Conference Center, Tahoe City, CA, USA



Over the last decade, microprocessor features such as deep pipelines, multiple cores, and complex memory hierarchies have made it increasingly difficult to achieve good performance in scientific applications and libraries. This fact has given rise to systems that automate the tuning process, using large amounts of computation to configure the application or library for good performance on the target architecture.

This workshop, the third in the series, will bring together researchers and practitioners in automatic tuning, in library design and construction, and in compiler-based code generation to identify and discuss opportunities and challenges in the use of automatic tuning for future petascale systems. As with last year, we are actively soliciting members of the compiler and library autotuning communities. In addition, we are interested in attracting attendees whose focus is on runtime optimization of scientific programs.

The workshop will consist of a series of talks and discussion sessions. We anticipate that most workshop attendees will present a talk on their research, their insights, and their experience. The discussion sessions will focus on opportunities to build shared infrastructure, along with issues raised during the workshops.


This workshop is sponsored by the Center for Scalable Application Development Software, with funding from the DOE Office of Science through the Scientific Discovery through Advanced Computing (SciDAC) program.


Welcome and Brief History [15 min]: Dongarra (UTK), Cooper (Rice), Vuduc (Georgia Tech)
Panel on "Big Questions" [1.5 hrs]: Dongarra (UTK), Frigo (Cilk Arts), Hall (Utah), Pingali (UT Austin), Shalf (LBNL)
  • Short position-style talks on some aspect of autotuning research. What works and what doesn't? What are the right metrics of success? What will be necessary to make autotuning research relevant to applications? To software and architectures at petascale and beyond?
Panel on Architectural Road Maps [1.5 hrs]: de Waal (NVIDIA), Fang (Intel), Flachs (IBM), Wadleigh (Convey)
  • What are the architectural targets/features with implications for performance tuning and analysis?
Session on High-level Programming Models [2.5 hr]: Amarasinghe (MIT), Frigo (Cilk Arts), Knobe (Intel), Pingali (UT Austin), Siek (UC Boulder)
  • What are the emerging languages, approaches, mechanisms, and opportunities for expressing scalable and tunable programs?
Sessions on Libraries for Multicore and Accelerator-based Systems [3.5 hr]: Aguillo (UTK), Katagiri (U. Tokyo), Volkov (Berkeley), Voronenko (CMU), Vuduc (Georgia Tech), Whaley (UT San Antonio), Williams (LBNL)
  • Speakers describe current work in tuning and autotuning for multicore and accelerator-based systems.
Sessions on Compiler-based Approaches [4 hr]: Cavazos (Delaware), Chame (USC/ISI), Cooper (Rice), Danalis (UTK/ORNL), Padua (UIUC), Quinlan (LLNL), Ramanujam (LSU), Sadayappan (OSU)
  • What are the prospects for generalizing autotuning methodologies beyond kernels by extending compilers?
Panel on Challenges in Industrial Software Development [1.5 hr]: Fu (Microsoft), Henry (Intel), Luk (Intel), Teranishi (Cray), Wadleigh (Convey)
  • What are the real development and tuning problems in industrial software libraries? What are the major challenges in bringing autotuning techniques into industrial software libraries?
Panel on Challenges in Massive-scale Applications and Systems [2 hr]: Henning (LANL), Heroux (Sandia), Levesque (Cray/ORNL), MacKenzie (DE Shaw Research)
  • Applications folks reflect on what they've heard, identify what is relevant and what is not, what the barriers to technology transfer will be, and what's missing in the research.

[Final Agenda + Slides]

Draft Agenda

Day 0: Sunday, August 9, 2009
7:00 PM Dinner for early arrivals in The Cedar House (verify location at check-in).
Day 1: Monday, August 10, 2009
7:30-9:00 Breakfast in Granhall (in the main lodge). Meeting starts down the hall in the Crystal-Emerald Room.
9:00-9:15 Welcome and Brief History of Autotuning: Jack Dongarra, Keith Cooper, Rich Vuduc
9:15-10:45 Panel on "Big Questions" (~20 min each): Jack Dongarra (UTK), Franz Franchetti (CMU), Matteo Frigo (CilkArts), Mary Hall (Utah), David Padua (UIUC), John Shalf (LBNL)
10:45-11 Break
11:00-12:30 Panel on Architectural Trends and Implications(~20 min each): Ben de Waal (NVIDIA), Paul Hennining (IBM), Brian Flachs (IBM), Kevin Wadleigh (Convey), John Shalf (LBNL)
12:30-2:00 Lunch
2:00-3:30 Session on Libraries for Multicore and Accelerator-based Systems, Part I (~30 min each) Emmanuel Aguillo (UTK), Yevgen Voronenko (CMU), Sam Williams (LBNL)
3:30-3:45 Break
3:45-5:15 Session on Compiler-based Approaches, Part I, (~30 min each): Keith Cooper (Rice), Dan Quinlan (LLNL), P. Sadayappan (OSU)
6:30 Dinner
Day 2: Tuesday, August 11, 2009
7:30-9:00 Breakfast
9:00-10:30 Session on High-level Programming Models, Part I (~30 min each): Saman Amarasinghe (MIT), Matteo Frigo (Cilk Arts), Kath Knobe (Intel)
10:30-10:45 Break
10:45-11:45 Session on High-level Programming Models, Part II (~30 min each): Donald Nguyen/Keshav Pingali (UT Austin), Jeremy Siek (UC Boulder)
12:00-1:30 Lunch
1:30-3:30 Session on Libraries for Multicore and Accelerator-based Systems, Part II (~30 min each): Takahiro Katagiri (U. Tokyo), Vasily Volkov (Berkeley), Rich Vuduc (Georgia Tech), Clint Whaley (UT San Antonio)
3:45-5:15 Session on Compiler-based Approaches, Part II (~30 min each): Jacqueline Chame (USC/ISI), David Padua (UIUC), J. Ramanujam (LSU)
5:15--5:45 Open Discussion
6:30 Dinner
Day 3: Wednesday, August 12, 2009
7:30-9 Breakfast
9:00-10 Session on Compiler-based Approaches, Part III (~30 min each):John Cavazos (U. Delaware), Anthony Danalis (UTK)
10:00-10:15 Break
10:15-11:30 Panel on Challenges in Industrial Software Development: Charles Fu (Microsoft), Greg Henry (Intel), Keita Teranishi (Cray), Kevin Wadleigh (Convey)
11:30-12:30 Lunch
12:30-2:30 Panel on Challenges in Massive-scale Applications and Systems and Open Discussion:Paul Henning (LANL), Mike Heroux (Sandia), Ken MacKenzie (DE Shaw Research)
  Rest of Day: Social Event (TBD)
7:00 Dinner
« March 2017 »
Su Mo Tu We Th Fr Sa

Powered by Plone

CScADS Collaborators include:

Rice University ANL UCB UTK WISC